Freescale Semiconductor /MK65F18 /SIM /SCGC2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCGC2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)ENET 0 (0)LPUART0 0 (0)TPM1 0 (0)TPM2 0 (0)DAC0 0 (0)DAC1

DAC1=0, TPM1=0, LPUART0=0, TPM2=0, ENET=0, DAC0=0

Description

System Clock Gating Control Register 2

Fields

ENET

ENET Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

LPUART0

LPUART0 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

TPM1

TPM1 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

TPM2

TPM2 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

DAC0

DAC0 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

DAC1

DAC1 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

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